A single machine or computer may be divided into logical (virtual) instances of the same machine, wherein each instance is referred to as a logical partition (LP) which can be operated independently. Various LPs may be configured for varying purposes, such as database operations, client/server operations, or separated test or production environments. Each LP will have a unique zone of memory, which is only accessible within the logical partition (i.e., zone 1 can not reference zone 2's memory). Thus, when it becomes necessary for an operation in a second zone to reference data stored in memory in a first zone, the data must first be moved from the first zone to the second zone. Each LP can communicate with other LPs as if the other LP were physically located in a separate enterprise server. This communication is carried out using an internal implementation of a Queued Direct Input/Output (QDIO) architecture referred to as iQDIO.
Typically queues in the QDIO architecture include one-hundred twenty eight entries, each entry having a Storage Block Address List (SBAL). Ordinarily each SBAL represents a single read or write operation, whereby each SBAL includes a fixed total length (e.g., 16 k and up to 64 k) of data with N number of 4 k entries (e.g. 4 and up to 16) per SBAL. Each entry, in turn, can be referred to as a storage list entry, and can provide its length and a pointer to a memory page or frame of real storage which can include one or more data packets, each having a protocol header and associated data. The total length of the SBAL is referred to as the iQDIO frame size (typical frame sizes include 16 k, 24 k, 40 k, 64 k).
The Signal Adapter Write instruction (SIGA-w) described by the QDIO Architecture on the IBM system z platform can move (copy) data from the memory of a source LP's zone to the memory of a target LP's zone. This memory to memory move is a very powerful function for machines that are divided into more than one LP.
The SIGA-w move function allows only a single list of buffers to be moved for an invocation of the instruction. As previously described, this list of write buffers is associated with an output SBAL. For every output SBAL that is moved, the SIGA-w instruction must be re-invoked. This re-invocation requires that all of the overhead associated with initializing and setting up a source zone to target zone data move must be repeated each time the instruction is invoked. This overhead can be a significant driver of CPU cost and latency associated with the data movement. The cost and latency become increasingly apparent in applications that move large objects or files.